📄️ Language Overview
SHDL (Simple Hardware Description Language) is a minimalist hardware description language designed for clarity and ease of use.
📄️ Lexical Elements
This section covers the basic building blocks of SHDL syntax.
📄️ Components
Components are the fundamental building blocks in SHDL. Each component defines a reusable circuit module with inputs, outputs, and internal logic.
📄️ Signals
Signals represent wires that carry digital values between components.
📄️ Connections
Connections define how signals flow between ports, instances, and constants.
📄️ Generators
Generators dynamically create SHDL code using a for-loop-like structure. Each line inside a generator is copied once for every value in the range, with the loop variable substituted.
📄️ Constants
Constants define fixed bit patterns that can be used in connections without external inputs.
📄️ Imports
Import components from other SHDL files using the use statement.
📄️ Standard Gates
Built-in primitive gates available in all SHDL files without imports.
📄️ SHDL Error Reference
This document describes all error codes that SHDL can produce, along with explanations and suggestions for fixing them.